1. Field of the Invention
The present invention generally relates to a dynamic memory structure. In particular, the present invention is directed to a dynamic memory structure of multigates in which the source terminal serves as part of a capacitor unit.
2. Description of the Prior Art
A dynamic memory is a type of memory which is widely used in electronic devices. In general, a dynamic memory contains a source and a drain which are located at both sides of the gate, a gate channel region which is located between the source and the drain, and a capacitor unit for the storage of charges. Traditionally speaking, the gate in a planar dynamic memory is usually disposed above the substrate, but the source and the drain are disposed in the substrate and the gate channel region which is located between the source and the drain is also embedded in the substrate. Moreover, the capacitance unit which is disposed inside or outside the substrate is electrically connected to one of the source and the drain. Such dynamic memory structure encounters bottleneck problems such as too much leak current to further scale down when the process goes to the nano-scale dimension so an ideal component density cannot be desirably achieved.